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1. I/O Bus Control –
Most modern computers use two buses: industry standard architecture (ISA) bus for slower
peripherals, and for compatibility with older components, and PCI a high-speed “local bus”
for hard disks, video cards and other high-speed devices. South Bridge controls these
buses, and transfers information to and from them and processor and memory. Capabilities
of South Bridge determine what kinds of buses system can support, what speed they can
run at, and what additional feature they can have.
2. Bus Bridges –
A “bridge’ is a networking term that refers to a piece of hardware that connects two
dissimilar networks and passes information from computers on one network to those on
other, and Vice-versa. In an analogous way, chipset must employ bus bridges to connect
together different system bus types it controls. Most common of these is PCI-ISA Bridge
which connects together devices on two different buses. South Bridge chip maintains
bridge between ISA bus by itself or through a PCI-to-ISA bridge chip.
3. Interrupt controller –
Interrupt controller provides means by which I/O devices request attention from processor
to deal with data transfers. South Bridge chip replaces PIC chip by incorporating all
functions of an Interrupt controller.
4. DMA controller support –
South Bridge provides direct memory access (DMA) controller support, which provides a
way for devices to transfer information directly to and from memory, without processor’s
intervention.
5. ATA/IDE Interface –
South Bridge chips usually provide dual IDE ports for connecting up to and disks, two in
each channel.
6. USB ports –
South Bridge chip also controls USB support on a motherboard.
7. Power manager –
South Bridge keeps a watch over overall electrical power consumption by different parts of
PC to save power.
8. Plug and Play support –
Plug and Play (PnP) is a specification that allows BIOS and OS to automatically detect
installation of new devices in system and assign appropriate resources to them
automatically. Plug and Play requires support from chipset as well.
Kavungya answered the question on September 1, 2021 at 05:44
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